4 replies to this topic

[toto_7]

Hello,

Need to help a friend on this and because did system ach. not so much...can't remember. I'll appreciate if anyone could help.

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Here are the questions:

a) Explain the purpose of each MUX in the above diagram
b) Describe the steps for the execution of the following instructions in the singlecycle MIPS CPU datapath: add $t7, $t1, $t4, lw $s5, 0($t7), sub $t7, $t2, $t3,
sw $s5, 1000($t4), beq $t7, $t1, 100

Suppose it takes memory 100 nsec to read a word, the ALU and adders take 4
nsec, the register file can be read or written in 1 nsec, the PC can be read or
written in 0.2 nsec, and all multiplexors take 0.1 nsec. Assume everything else
takes 0 time (control, shift, sign extend, wires, etc.).
How long will it take to execute an add instruction?
How long will it take to execute a lw instruction?
How long will it take to execute a beq instruction?
How long will it take to execute a j instruction?
What would be the single-cycle CPU cycle time for the above scenario?

Thanks,toto7

[dargueta]

We have an unspoken policy here that we help with homework, but we won't do it for you. What do you have so far?

Just out of curiosity: Is that diagram from Computer Organization and Design by Patterson and Hennessy?

[toto_7]

Oh didn't know that, I'm sorry. Can any moderator remove this post? For you question, I have no idea, because this exercise is not mine. Thanks dargueta

[dargueta]

Feel free to ask questions, we just won't do it for you.

[spcm0012]

Well MUX would be a multiplexer, think about what a multiplexer does, and why that might be useful where they put it.