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help with VHDL codes

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#1
tetooo_2006

tetooo_2006

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hi all ,


i have this code for a 5-bits binary counter :

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;


ENTITY counter IS
    PORT ( count : OUT unsigned (4 DOWNTO 0);
    load : IN STD_LOGIC;
    pre :IN unsigned (4 DOWNTO 0);
    Clk : IN STD_LOGIC);
END counter;


ARCHITECTURE Behavioral OF counter IS
SIGNAL c : unsigned(4 DOWNTO 0) := "00000";


BEGIN
    count <= c;
    PROCESS(Clk)
    BEGIN
        IF( rising_edge(Clk) ) THEN
            IF(load = '1') THEN
                c <= pre;
            ELSE
                c <= c + 1;
            END IF;
        END IF;
    END PROCESS;
END Behavioral;

I want to connect a binary decoder that shows the state of the counter
how can i do that?

can any one help me plz

Edited by dargueta, 06 August 2011 - 11:57 PM.
Reformatted code for readability


#2
dargueta

dargueta

    Writes binary right handed and hex left handed

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What do you mean by "binary decoder?" A seven-segment display, LEDs, a thermometer-scale output...
sudo rm -rf /

#3
tetooo_2006

tetooo_2006

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dargueta said:

What do you mean by "binary decoder?" A seven-segment display, LEDs, a thermometer-scale output...

5 to 32 binary decoder by use T flip flop.
seven-segment display

#4
dargueta

dargueta

    Writes binary right handed and hex left handed

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Seven-segment display wirings (at the bottom). This'll help you get started.
sudo rm -rf /




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