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#1
club24

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Hi, I just have some questions about ISA. I'm still a beginner so please explain clearly.

I read this chapter about ISA and there were some things that confused me so if you can explain them, please do.

Most architectures using the big endian scheme do not allow words to be written
on non-word address boundaries (for example, if a word is 2 or 4 bytes, it must
always begin on an even-numbered byte address).This wastes space. Little
endian architectures, such as Intel, allow odd address reads and writes, which
makes programming on these machines much easier


I'm confused on what they mean by "non-word address boundaries" and the paragraph in general.
----------------------------------------

word size/length

I asked and googled about this. Just so I'm clear, word size is the amount of units that we use to move information around.

--------------------------------------

0000 R1 R2 R3 15 3-address codes
...
1110 R1 R2 R3

1111 0000 R1 R2 14 2-address codes
...
1111 1101 R1 R2

1111 1110 0000 R1 31 1-address codes
...
1111 1111 1110 R1

1111 1111 1111 0000 16 0-address codes
...
1111 1111 1111 1111


We can see the use of the escape opcode in the first group of 3-address instructions. When the first 4 bits are 1111, that indicates the instruction does not have 3 operands, but instead has 2, 1 or none (which of these depends on the following groups of 4 bits). For the second group of 2-address instructions, the escape
opcode is 11111110 (any instruction with this opcode or higher cannot have more
than 1 operand). For the third group of 1-address instructions, the escape opcode
is 111111111111 (instructions having this sequence of 12 bits have zero
operands).


Can you explain this idea? Thank you for the help

#2
dargueta

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Quote

Just so I'm clear, word size is the amount of units that we use to move information around.
Yes. It's usually measured in bytes. For example, a 32-bit processor uses data in 32-bit chunks (4 bytes); 64-bit processors deal with data in chunks of 64 bits (8 bytes). Older processors and PICs have smaller data sizes, typically 8 or 16 bits, but 12- and 24-bit thingies exist as well.

Here's where things get a bit weird. First, allow me to explain the two main ways of storing multi-byte integers in memory. Every integer requires a fixed amount of space; depending on the capabilities of the processor and the definitions of the programming language, it can be one byte, two bytes, four, eight, and so on. For multi-byte integers, there are two main ways of storing them in memory: big-endian and little-endian. To make a long story short, you can read integers of different sizes more easily on a little-endian machine than a big-endian machine, which explains why MIPS processors will barf when accessing an "unaligned" address, but an Intel processor won't complain at all.
sudo rm -rf /




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