29 replies to this topic

[WingedPanther]

There are two types of vectors. In physics, it is "a magnitude and a direction". This covers almost everything related to motion.

In math, it's an ordered set of values. It corresponds with the idea of an array in programming.

[dargueta]

I think h4x means an "interrupt vector." It's simply an array of 256 addresses, usually located at address 0, that point to subroutines to execute when an interrupt is called. For example, let's say you're writing some low-level code that executes before the operating system is loaded, and you want to output some text to the screen. Assuming the string you want to output is at address 0x0185, you would write the following:

mov    ah,09h
mov    dx,0185h
int    21h

AH contains the function we want to execute (print to screen in this example), and DS:[DX] points to the string itself. Interrupt 0x21 is then called.

When an interrupt is triggered, the processor does several things:
1) Pushes all registers onto the stack, except (E)SP.
2) Pushes the return address onto the stack
3) For interrupt N, it looks at the Nth address in the interrupt vector and jumps to that location.
4) The interrupt service routine does its job, and then executes IRET (return from interrupt)
5) The processor pops all registers off the stack and resumes execution where you left off.

In C, this would be:

void (*interrupt_vector)(void)[256];

void execute_interrupt(int interrupt_number)
{
    push_registers();
    push(eip);
    interrupt_vector(interrupt_number);
    pop(eip);
}

There are two kinds of interrupts; hardware-triggered and software-triggered interrupts. Hardware-triggered interrupts are caused when hardware sends an interrupt signal to the processor; the system timer, for example, calls interrupt 0x08 18.2 times per second. (Don't ask me why it's 18.2, it just is, though this can be reprogrammed.)
Software interrupts, like 0x21, used to be used to perform various kinds of IO routines, from console graphics to COM / LPT port interaction. Nowadays that's all done through device drivers, which talk directly to the hardware instead of going through the BIOS, which is considerably slower.

Interrupt Reference

[dargueta]

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Why call address a vector?

It's the array of addresses that's referred to as the vector. Same reason why the STL array class in C++ is called vector.

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int 0x21 is just a gate in dos, very lile syscall in x64 systems. cpu use in and out to communicate with hardware.

Not all the time...look up memory-mapped IO.

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I have 1 more problem with interrupts. cpu start in real mode (no paging, ring 0).
OS run in protected mode. Does IDT stay same from beggining?

The operating system loads in real mode, and switches into protected mode via special ring 0 instructions.

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ok when loading os it might add some handlers for system reserved interrupts like 0x2e on unix. I mean, int 0 is division error no matter if cpu generate if from real or protected mode?

Correct. However, before the system switches into protected mode, it reassigns certain entries in the interrupt vector to point to its own subroutines, not the BIOS's default handlers. Code a program that divides by 0 and run it - the operating system, not the BIOS, will respond.

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int 8 is real time clock, 1/55 miliseconds. What about main bus? there is another clock, wich actually run everything (cpu cycles, access to ram, access to other hardware). Wich one is it?

There are several clocks, all controlled by the front-side bus clock. All other clock speeds are multiples of this - the RAM, the CPU, etc. For example, a computer with an FSB of 200MHz will multiply the clock by about 12 or so to get a CPU frequency of 2.4GHz. When you overclock your CPU, you're not changing the FSB, just the multiplier for the CPU.

The CPU immediately processes all hardware interrupts, i.e. the ones that are signaled on the processor's physical pins. Software interrupts, on the other hand, are generated by the INT, INTO, and INT3 instructions.

[dargueta]

There's an IOPL field in each segment that dictates what privilege that section of code runs at. Changing the IOPL of a code segment is a privileged instruction that can only be executed in ring 0 and maybe ring 1, you'll have to double-check me on that.

Instruction execution is always atomic - you can't interrupt a CPU in the middle of an instruction. It will finish executing the current instruction, save the register state, service the interrupt, and then restore the register state and resume execution.

[dargueta]

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We live in a world of flat memory, dark ages are past.

We live in the era of paged memory. Pages are implemented using segment tables that contain information such as privilege levels, read/write/execute permissions, etc. I only refer to them as segment tables because they use segment registers to load them. Look at the LSL, LGDT, LIDT instructions in the Intel Instruction Set Reference.

As for your question about SYSENTER:

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[...] the interrupt gate (entry 2e in the Interrupt Descriptor Table) identifies the entry in the Global Descriptor Table which in turn identifies the code segment that contains the [system] function. Loading the 8-byte interrupt gate and segment descriptors from memory is sped up by keeping these gate/descriptors cached in the processors on-chip (level 1) or off-chip (level 2) cache. The CPU is very likely to find these gate/descriptors cached because each and every [...] system call uses the same interrupt gate and code segment descriptor when making a system call via the 'int 2e' software interrupt. However, the CPU still must perform memory read cycles to read from the cache, make access privilege checks, and so forth every time when switching the privilege level via the 'int 2e' software interrupt. After having analyzed the whole sequence of events involved in switching to kernel-mode, it is clear that it would be much faster if the CPU could be hard coded to always switch to the same location in a kernel-mode segment when a system call is issued. Because the destination function is now hard coded, no memory reads are necessary to find out where the system call should end up. This would speed up system calls significantly. This is exactly what is being done by the Intel SYSENTER and the AMD SYSCALL instructions that are present in the Pentium II, AMD K7, and newer CPUs. These instructions are collectively referred to as "Fast System Call" instructions.

System Call Optimization with the SYSENTER Instruction - CodeGuru.com

[dargueta]

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I refuse to read anything about selectors. It wont make any good, i wont write os that way. Memory is paged, ok, but not segments/selectored/whatever.

Dude...that is so wrong. That is how protected mode works! Segment registers are just used as indexes into the global descriptor table that contains permissions and such for each segment of memory. Without this, there would be no hardware memory protection whatsoever, and any program could access any byte in memory, change the contents of the CR control registers, execute privileged instructions -- flash the BIOS if it wanted to, and so on.

Read Chapter 3 of the Intel64 / IA32 Software Developer's Manual - System Programming Guide, Volume 3A if you don't believe me.