6 replies to this topic

[Aereshaa]

The venerable make utility is one of the oldest source control methods that exists. It allows one to compile a program in one shot, without any redundancies, simply by typing:
$ make
The make looks in the current directory for a file named "makefile". The makefile determines which files are dependent on which others. Based on these relations and whether the files have been modified, make executes shell commands found in the makefile.
The basic parts of a makefile are the targets. Targets take the form:

file: dependency dependency dependency

        commands

The commands would produce file from the dependencies. A makefile usually has target rules in order to let the compiler do as little work as possible.
An example would be:

grep : grep.o regex.o

        gcc grep.o regex.o -o grep

grep.o : grep.c

        gcc -c grep.c -o grep.o

regex.o : regex.c

        gcc -c regex.c -o regex.o

In this example, when one modifies regex.c, grep.c is not unnecessarily recompiled. Also, all of the variables in your environment are loaded into make as macros, which are accessed like this: $(CC).
So that's how you use source control with make.

[WingedPanther]

Very nice. I haven't gotten around to studying make files yet.

[whitey6993]

Good tutorial, short and to the point.

[Egz0N]

nice tutorial :)

[MathX]

:D..

[kannan v]

nice tutorial